Verilog synthesis book

Verilog HDL Synthesis, A Practical Primer

Foreword by Vassilios C. Gerousis, Motorola

Table of Contents
236 pages, Softcover
US$69.95 (Quantity discounts)
ISBN 0-9650391-5-3
Star Galaxy Publishing, October, 1998 


Or you can order it through your favorite bookstore.

Indian Edition
BS Publications, 2001
ISBN 81-7800-011-3



Japanese edition
CQ Publishing, 2001
ISBN 4-7898-3354-2




Reader comments:

"The perfect Verilog bookset"

"I've finished reading your book, I have to say I think you did an outstanding job ... I will be very comfortable recommending your book instead ... I really think this is your best book yet, good job!" 
- Ken Coffman, VLSI designer

"I am a reader of your two verilog books: "A Verilog HDL Primer" and "Verilog HDL Synthesis". I like your writing style, concise and always to the point, I hope you have more books on this topic in future."
- Gerald(*) from Credence

"Provides students and practicing logic designers with immediate access to well organized information about Verilog HDL synthesis. Easy to read and provides a large number of examples of synthesizable Verilog models" 
- Vassilios Gerousis, Senior Staff Technologist, Motorola

"Bhasker's book reveals a variety of situations where differences between simulation and synthesis semantics are bound to occur. These are carefully covered so that novice and experienced designers become aware of these hard to debug but, very common pitfalls"
- Carlos M. Román, Bell Labs.

"The book "A Verilog Synthesis Primer" is an excellent clear and concise guide for designing RTL synthesizable models in Verilog. It is an essential addition to design engineers' technical resourses." 
- Douglas J. Smith, author of "HDL Chip Design."

"The example-driven driven approach used in the Verilog HDL Synthesis Primer makes it a valuable book for novice Verilog users." 
- Egbert Molenkamp, University of Twente

"I find the book useful in illustrating examples of how the Verilog language may be used to design real and practical synthesizable models. It's also helpful that it warns the user of possible simulation/ synthesis mismatches. This clarifies the sim/syn issues for beginners."
- Jenjen Tiao, Lucent Technologies

"This book is ideally organized for teaching Verilog-based synthesim various techniques, as it shows the reader not only what hardware results fros Verilog constructs, but how to tailor the Verilog to get the desired hardware. Copious pairings of examples with diagrams make clear the relationships between code and generated gates" 
- Jim Vellenga, ViewLogic Systems

"This is the best book on Verilog Synthesis. The book is very practical, and I immediately applied many examples into my work."
- Ling Q. Chien, Ph.D., Virtual Wire Inc.

" I've found the Bhasker books on synthesis to be quite useful"

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