Static Timing Analysis

Static Timing Analysis for Nanometer Designs, A Practical Approach

by R. Chadha & J. Bhasker



Hardcover
572 pages
ISBN 978-0-387-93819-6
by J.Bhasker, Rakesh Chadha
Online version available

Click here to order or for content information

Click here to order from Amazon.com


Reader comments:

" This book provides an excellent introduction to STA. Topics such as delay calculation, LIB files, timing paths, timing checks, and SDC are explained clearly using many examples. "
- Pete Jarvis, Applications Consultant at Synopsys

" The book is geared towards professionals who want to learn or enhance their knowledge of STA. The book explains the concepts clearly and succinctly. "
- Johnson Limqueco, Oasys Design Systems

" This book would be useful to those in industry dealing with STA tools day in and day out, especially for new designers ramping up. "
- Anonymous reviewer

" Overall it is an excellent book and we recommend it as a companion book to our synthesis (Encounter RTL Compiler) customers. "
- Hormoz Yaghutiel, Cadence Design Systems

" The book does a very good job introducing and explaining the physical characteristics that affect the timing performance of ASICs, such as the various RC phenomena and the effective capacitance model (and it's limitations). Coverage of signal integrity issues and on-chip variation are also good, clock-path pessimism removal is explained well. "
- Bill Touhy, ASIC designer

" This book is useful for someone who likes to know STA in practice. This may be more practical one compared to others. "
- Anonymous reviewer

" When someone enters the world of STA (static timing analysis), it's usually a trial-by-fire where you jump right into the fray and learn as you go. This wasn't too bad several years ago, but STA is complex enough now that this method of learning can be rather painful. Training seminars help convey the basics, but it's hard to absorb months or years worth of practical knowledge in a few days of training.
This book is a great introductory book that covers just about all relevant aspects of STA that an engineer must know. Concepts are explained with lots of reports and timing diagrams, including examples taking from real-world I/O situations (such as DDR interfaces). Timing exceptions, clock gating, crosstalk, clock relationships, static noise - the book provides well-rounded coverage of a broad set of topics which should bring anyone up to a competent level of modern-day STA capability. "
- Chris Papademetrious, PrimeTime Corporate Applications Engineer, Synopsys Inc.

" This book provides an excellent overview of STA for ASIC designers. The book has an in-depth overview of various topics which affect the timing performance of designs. The concepts of timing paths, timing checks and clocks are also explained well. I use the book often as a reference for my ASIC projects. "
- Hai Phuong, ASIC Architect for ProCurve Networking Business, Hewlett-Packard

" May I thank you and congratulate for having written such a concise and important book that has really helped me a lot in clearing up several concepts. Being a budding physical design engineer, I have been greatly benefiting from your work. "
- Suprio Bhattacharya

You are visitor number Thanks for visiting!