The perfect Verilog bookset: A Verilog HDL Primer, second edition, Verilog HDL Synthesis, A practical primer, both by J.Bhasker Star Galaxy Publishing1999 and 1998 respectively and The Verilog PLI Handbook, second edition by Stuart Sutherland, Kluwer Academic Publishers 2002

The perfect Verilog book set:

Reviewer Vladimir Botchev

These three books are different in style, assume different background but also together present almost all that the most popular in the industry HDL dialect, Verilog, has to offer. The first two books are primers and do not assume prior exposure to HDL intricacies. They are primers, but written in a manner to serve as references as well. The third book assumes familiarity with the core Verilog language and presents thoroughly and in the most complete manner the interface of Verilog to an external simulation environment via the PLI routines. This third work is both a PLI tutorial and encyclopedic reference. The third book is accompanied by a CD containing C source code and Verilog test cases using PLI routines. It is practically impossible to describe in a limited by space review the detailed contents of these books, so the topics discussed will be presented without chapter references for the most part.

The first primer begins with a tutorial delving immediately into a practical, although simple, design to give the reader a feel of the language. This is a proven to work well method, at least for Verilog, and has been used in some other Verilog texts too. Then follows a very detailed description of language elements, which might sound dry, but as every artificially built system there has to be some formalism to help structure it. Next come expressions, described at the same level of thoroughness and detail. This portion of the book is perfect for reference. No mention of Verilog 2001 extensions of course, but these are tackled upon in the third book. Gate-level modeling comes next including MOS switches and electrical delays definitions and examples. User defined Primitives chapter(chapter 6) ends this tutorial/reference section of the book. The traditional three modeling types, Dataflow, Structural and Behavioral are serviced by a separate chapter each. Short, precise sections on a wealth of design cases, very clear explanations, make these chapters a core that provides solid understanding of these very important design styles. More advanced topics are left to the remaining chapters. Topics such as tasks definition and use, functions and a glimpse into PLI. A good starting chapter on verification and writing test benches(chapter 11) is provided with some rather elementary examples and modules that could help in performing a simulation. The book ends with a chapter providing examples on basic building blocks for synchronous digital designs, state machines as well as some frequently encountered combinatorial designs such as multiplexers. The only appendix reproduces the formal syntax of the Verilog language from the IEEE standard document(the í95 version).

The second book is as the title says, a primer of synthesis with Verilog, that is this subset of the language which can be used toward the production of an ASIC(or configuring an FPGA). The style is as in the preceding book, clear and concise. A book for both beginners and experts. The first group to learn a good RTL style, the second to appreciate the benefits of the style introduced and perhaps follow or adapt it to their work style. The book has five chapters and two appendixes. Chapter one is on the basics, such as wires, data sizes etc. and there is a slight overlap with the first book, which makes a good continuity in the writing. Follow descriptions of how actually Verilog constructs are mapped to gates and how to model synthesizable constructs. This is a very important piece of work, one that readers will refer to again and again. Chapter four introduces powerful optimization techniques, some in the toolset of most modern compilers, but that could also be done by hand and fine tuned. The final chapter is devoted to validating the synthesized design. Again a chapter that will be frequently used as a reference. The appendixes give examples of modules and constructs for a particular system that might be of little use in a general context, but nevertheless may serve as a source of examples. One could only regret these books do not come with an electronic supplement such as a CD, or that FPGA particularities are not discussed. Other books fill that FPGA gap, such as Michael Cilletti Verilog series.

The third book is a real marvel in that it not only teaches PLI, but serves also as an encyclopedic reference on this crucial to simulation portion of the Verilog environment, and also provides a thorough insight to the standard, explaining and clarifying existing ambiguosities in it. The book is big, almost 800 pages, the price also, but itís worth every single penny. It has eighteen chapters and four appendixes. The chapters are further grouped into two parts devoted to the two major portions of the Verilog PLI standard, the VPI portion and the TF/ACC portion. Each part follow the same pattern, namely an introductory chapter on how to create PLI applications using respectively VPI or TF(ACC) followed by explanations on how to interface the above mentioned applications to a Verilog simulator, explanations containing the inner workings of these applications, callback routines, compiling and linking. Step by step examples illustrate the processes, the code for all examples is on the accompanying CD ROM. A chapter on how to use the created applications follows with again a full worked example. Next details about the libraries are given(VPI and ACC) that show how the user can get more in control of his simulations. Accessing registers, nets and memories are the subject of a separate chapter as well as the very important subject of synchronizing to the simulation with callback routines. A chapter which readers will appreciate I believe at the highest level is the one(actually two since similar chapters exist in both parts) detailing how to interface C models with Verilog simulators. This is a must to know and use tutorial/reference chapter for all serious in size simulation undertakings. The first appendix details the steps to use in order to link PLI applications to three selected Verilog Simulation environments, Cadence, Synopsis and Mentor Graphics. The remaining three appendixes provide the details of the 2001 standard for ACC, VPI and TF routines libraries.

In conclusion the briefly described Verilog book set is highly recommended for digital designers and so far can be termed as an unbeatable one.